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SC2443
POWER MANAGEMENT Features
u Wide input voltage range: 4.7V to 6V u 0.5V feedback voltage for low-voltage outputs u Programmable frequency up to MHz per phase u 2-Phase synchronous continuous conduction mode for high efficiency step-down converters u Out-of-phase operation for low input current ripples u Output source and sink currents u Fixed frequency peak current-mode control u 75mV/-0mV maximum current sense voltage u Inductor DCR current-sensing for low-cost applications u Dual outputs or 2-phase single output operation u Excellent current sharing between individual phases u Individual soft-start, overload shutdown and enable u External reference input for DDR applications u External synchronization u Industrial temperature range u 4mm X 4mm Xmm 24-lead MLPQ package
Dual-Phase Single or Two Output Synchronous Step-Down Controller
Description
The SC2443 is a high-frequency dual synchronous step-down switching power supply controller. It provides out-of-phase high-current output gate drives to all N-channel MOSFET power stages. The SC2443 operates in synchronous continuous-conduction mode. Both phases are capable of maintaining regulation with sourcing or sinking load currents, making the SC2443 suitable for generating both VDDQ and the tracking VTT for DDR applications. The SC2443 employs fixed frequency peak current-mode control for the ease of frequency compensation and fast transient response. The dual-phase step-down controllers of the SC2443 can be used to produce two individually controlled and regulated outputs or a single output with shared current in each phase. The Step-down controllers operate from an input of at least 4.7V and are capable of regulating outputs as low as 0.5V Individual soft-start and overload shutdown timer is included in each step-down controller. The SC2443 implements hiccup overload protection. In single output current share configuration, the master timer controls the soft-start and overload shutdown functions of both controllers.
Applications
u Telecommunication power supplies u DDR memory power supplies u Graphic power supplies u Servers and base stations
Typical Application Circuit
VOUT1 VP1 VIN VIN
VOUT1 VP1
VIN
VIN
VP1
24 23 22 21 20 19
VOUT1
24 23 22 21 20 19
VP1
IN1-
VOUT1 IN1-
U1 1 2 3 4 5 6
U1 1 2
CS1+
SS1/EN1
BST1
CS1-
SS1/EN1
ROSC
GDH1
ROSC
GDH1
CS1+
BST1
CS1-
IN1-
IN1-
GDL1 PVCC PGND
18 17 16 15 14 13 VIN
IN1-
IN1-
GDL1 PVCC PGND
18 17 16 15 14 13 VIN
COMP1 SYNC AGND REF
SS2/EN2 COMP2 AVCC
COMP1 SYNC AGND REF
AVCC 12
3 4
VOUT2 IN2-
SC2443
GDL2 GDH2 BST2
SC2443
GDL2 GDH2
SS2/EN2
5 6
CS2-
IN2-
10
11
12
7
8
9
10
CS2+
CS2-
REFIN
COMP2
CS2+
REFIN
BST2
IN2-
VIN
11
7
8
9
VIN
IN2-
Dual Independent Outputs
Single Output With Current Sharing
July 09 2007
SC2443
Pin Configuration
Top View
SS1/EN1 ROSC
24
Ordering Information
Device SC2443MLTRT (1,2) SC2443EVB
GDH1 BST1
Package 24-lead 4mm X 4mm X mm MLPQ Evaluation Board
CS1+
CS1-
19
IN1COMP1 SYNC AGND REF REFIN
1
18
GDL1 PVCC PGND GDL2 GDH2
Notes: () Available in tape and reel only. A reel contains 3,000 devices. (2) Available in lead-free package only. Device is WEEE and RoHS compliant.
6
13
BST2
7
12
CS2-
(24-lead 4mm X 4mm X mm MLPQ)
JA = 29C/W
Marking Information
Marking for the 4 X 4mm MLPQ-24 package:
COMP2
SS2/EN2
AVCC
IN2-
CS2+
2
SC2443
Absolute Maximum Ratings
AVCC, PVCC Voltage ................................. VBST, VBST2 Voltage .................................... SS/EN, SS2/EN2, SYNC Voltage .................. -0.3 to 20V -0.3 to 32V -0.3 to 6V
Recommended Operating Conditions
Input Voltage Range .............................. 4.75V to 6V
Thermal Information
Junction to Ambient() ................................. 29C/W Maximum Junction Temperature ........................... 50C Storage Temperature .............................. -65 to +50C
IN-, IN2-, REF Voltage ..................... -0.3 to AVCC+ 0.3V REFIN , COMP, COMP2 Voltage ............ -0.3 to AVCC+ 0.3V CS+, CS-, CS2+, CS2- Voltage ............ -0.3 to AVCC+ 0.3V PGND to AGND ............................................. 0.3V Peak IR Reflow Temperature ................................. 260C
Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not recommended. NOTES() Calculated from package in still air, mounted to 3" x 4.5", 4 layer FR4 PCB with thermal vias under the exposed pad per JESD5 standards. (2) This device is ESD sensitive. Use of standard ESD handing precautions is required
Electrical Characteristics
Unless otherwise specified: AVCC = PVCC = 2V, VBST = VBST2 = 2V, SYNC = 0V, -40C < TA = TJ < 85C, ROSC =5.kW.
Parameter Undervoltage Lockout AVCC Start Threshold AVCC Start Hysteresis AVCC Operating Current AVCC Quiescent Current in UVLO Channel 1 Error Amplifier Non-inverting Input Voltage Non-inverting Input Line Regulation Input Offset Voltage Inverting Input Bias Current Amplifier Transconductance Amplifier Open Loop Gain Amplifier Unity Gain Bandwidth COMP Switching Threshold Amplifier Output Sink Current Amplifier Output Source Current
Symbol
Conditions
Min
Typ
Max
Units
AVCCTH AVCCHYST ICC Iq
AVCC rising
4.5 70 2
4.7 6
V mV mA mA
AVCC = AVCCTH - 0.2V
.7
VIN+ AVCCTH < AVCC < 5V
0.49
0.5
0.5 0.02
V %/V mV A W-1 dB MHz V A A
IINGM AOL VCS+=VCS- = 0, VSS Rising VIN- = V, VCOMP = 2.5V VIN- = 0V, VCOMP = 2.5V
-0. 260 65 5 2.2 6 2
-0.25
3
SC2443
Electrical Characteristics (continued)
Parameter Channel 2 Error Amplifier Input Common-mode Range() Inverting Input Voltage Range Input Offset Voltage Non-inverting Input Bias Current Inverting Input Bias Current Inverting Input Voltage for 2 phases Single Output Operation Amplifier Transconductance Amplifier Open Loop Gain Amplifier Unity Gain Bandwidth COMP2 Switching Threshold Amplifier Output Sink Current Amplifier Output Source Current Oscillator Channel Frequency Synchronizing Frequency SYNC Input High Voltage SYNC Input Low Voltage Channel Maximum Duty Cycle Channel Minimum Duty Cycle Current Limit Comparator Input Common Mode Range Cycle by cycle Peak Currentr Limit Valley Current Overload Shutdown Threshold Positive Current sense Input Bias Current Negative Current sense Input Bias Current VILIM+ , VILIM2+ VILIM- , VILIM2ICS+ , ICS2+ ICS- , ICS2VCS- = VCS2- = 0.5V, Sourcing VCS- = VCS2- = 0.5V, Sinking VCS+ = VCS- = 0 VCS2+ = VCS2- = 0 VCS+ = VCS- = 0 VCS2+ = VCS2- = 0 0 60 -85 75 -0 -0.7 -0.7 AVCC- 90 -30 -2 -2 V mV mV A A DMAX, DMAX2 DMIN, DMIN2 88 0
() ()
Symbol
Conditions
Min
Typ
Max
Units
0 0 .5 IIN2+ IIN22.5 GM2 AOL2 VCS2+=VCS2- = 0, VSS2 Rising VCOMP2 = 2.5V VCOMP2 = 2.5V 260 65 5 2.2 6 2 -50 -00
3 AVCC -380 -250
V V mV nA nA V W-1 dB MHz V A A
fCH, fCH2
450 2.fCH .5
500
550
kHz kHz V
0.5
V % %
4
SC2443
Electrical Characteristics (continued)
Parameter Gate Drivers High side Gate Driver Peak Source Current High side Gate Driver Peak Sink Current Low side Gate Driver Peak Source Current Low side Gate Driver Peak Sink Current Gate Drive Rise Time Gate Drive Fall Time Low side Gate Driver to High side Gate Driver Non-overlapping delay High side Gate Driver to Low side Gate Driver Non-overlapping delay Minimum On Time Soft Start, Overload Latchoff and Enable Soft Start Charging Current Overload Enabling Soft Start Voltage Overload IN- Threshold Overload IN2- Threshold Soft Start Discharge Current Overload Recovery Soft Start Voltage Gate Driver Disable SS/EN Voltage Gate Driver Enable SS/EN Voltage Internal 0.5V Reference Buffer Output Voltage Load Regulation
Notes: () Guaranteed by design.
Symbol
Conditions
Min
Typ
Max
Units
VBST, VBST2 = 2V VBST, VBST2 = 2V AVCC = PVCC = 2V AVCC = PVCC = 2V CL = 2200pF CL = 2200pF CL = 0 CL = 0 TA = 25C
.5 .5 20 20 90 90 50
A A A A ns ns ns ns ns
ISS , ISS2
VSS = VSS2 = .5V VSS and VSS2 Rising VSS = 3.8V, VIN- falling VSS2 = 3.8V, VIN2- falling
2 3.2 0.75VREF 0.72 X .4 0.3 0.7 0.5 0.9 .2 .5 0.7
A V V V A V V V
ISS _DIS , ISS2_DIS VSSRCV , VSSRCV2
VSS = VSS2 = 3.8V VSS and VSS2 Falling
VREF
IREF = -mA 0 < IREF <-5mA
490
500 0.05
50
mV %/mA
5
SC2443
Typical Characteristics
UVLO Threshold vs. Temperature
4.55 4.54 12.9 12.8 12.7 12.6 12.5 12.4 12.3 12.2 12.1 12 -40 25 85
AVCC operation current vs. Temperature
1.85 1.80 1.75 1.70 1.65 1.60 1.55
AVCC current in UVLO vs. Temperature
AVCC Current in UVLO(mA)
AVCC operation Current(mA)
AVCC UVLO(V) VREF(mV) COMP Switching Threshold(V) SS/EN Threshold Voltage(V)
4.53 4.52 4.51 4.50 4.49 -40 25 85
-40
25
85
Temperature (OC)
Temperature (OC) COMP Sink/Source current vs. Temperature
20 15 10 5 0 -5 -10 -15 -40 25 85 290
Temperature (OC)
VREF vs. Temperature
502.0 501.5 501.0 500.5 500.0 499.5 499.0 -40 25 85
E/A GM vs. Temperature
280 270 260 250 240 230 220 -40 25 85
COMP SINK/SOURCE Current(uA)
SINK
E/A GM(uW-)
SOURCE
Temperature (OC) COMP switching Threshold vs. Temperature
2.35 512
Temperature (OC) Switching Frequency setting vs. Temperature
Switching Frequency(KHz)
510 508 506 504 502 500 498 496
Temperature (OC) Cycle by Cycle OCP threshold vs. Temperature
75.0 74.5 74.0 73.5 73.0 72.5 72.0 71.5 71.0 -40 25 85
Cycle by Cycle OCP Threshols(mV)
2.30 2.25 2.20 2.15 2.10 2.05 -40 25 85
ROSC = 5.KW
-40 25 85
Temperature (OC) SS/EN Threshold for Overload Hiccup vs. Temperature
3.18 3.17 3.16 3.15 3.14 3.13 3.12 3.11 3.10 -40 25 85 1.30 1.25 1.20 1.15 1.10 1.05 1.00 0.95 0.90 0.85 0.80 -40
Temperature (OC) SS/EN Threshold for Gate Driver Enable / Disable vs. Temperature
SS/EN Threshold Voltage(V) SS/EN Threshold Voltage(V)
Enable
Temperature (OC)
SS/EN Threshold for Overload Hiccup Recovery vs. Temperature
0.58 0.56 0.54 0.52 0.50 0.48 0.46 0.44 0.42 -40 25 85
Disable
25
85
Temperature (OC)
Temperature (OC)
Temperature (OC)
6
SC2443
Typical Application Circuit Performance
Circuit Conditions : Single output current share configuration as shown in page 5
Soft Start
Releasing SS/EN pin from GND
Releasing SS/EN pin from GND
VIN 5V/DIV
VIN 5V/DIV EN/SS 2V/DIV
COMP V/DIV EN/SS 2V/DIV VIN 2V/DIV VOUT V/DIV
COMP V/DIV EN/SS 2V/DIV VOUT V/DIV
GDL 5V/DIV
VOUT V/DIV
0ms/DIV
0ms/DIV
0ms/DIV
Shuting down _ VIN ramp down
Pulling SS/EN pin to GND
Gate Wavefroms
VIN 2V/DIV EN/SS 2V/DIV GDL 0V/DIV
VIN 5V/DIV EN/SS 2V/DIV GDL 0V/DIV
GDH GDL 0V/DIV
VOUT V/DIV
VOUT V/DIV
GDH2 GDL2 0V/DIV
ms/DIV
400us/DIV
us/DIV
Output Ripple _ IOUT = 40A
Transient Response _ 0A ~ 30A
OCP Trip _ IOUT = 56A
GDH GDH2 0V/DIV
SS/EN 2V/DIV VOUT 50mV/DIV GDH 20V/DIV GDL 0V/DIV
VOUT 20mV/DIV VOUT 0.5V/DIV
us/DIV
200us/DIV
400us/DIV
OCP Recovery to 30A loading
EFF (%) 90
Efficiency (2VIN to VOUT)
80
SS/EN 2V/DIV GDH 20V/DIV GDL 0V/DIV
70 60 50 40 30
VOUT 0.5V/DIV
20ms/DIV
1
5
10
15
20
25
30
35
40 IOUT(A)
7
SC2443
Typical Application Circuit Performance
Circuit Conditions : Dual independent outputs configuration as shown in page 7
Soft Start (VOUT)
Soft Start (VOUT2)
Soft Start (Both outputs)
SS/EN 2V/DIV
COMP EN/SS 2V/DIV VIN 2V/DIV VOUT V/DIV
COMP2 V/DIV EN2/SS2 2V/DIV VIN 2V/DIV VOUT2 2V/DIV
VOUT 0.5V/DIV
SS2/EN2 2V/DIV
0ms/DIV
0ms/DIV
VOUT2 2V/DIV
20ms/DIV
Gate waveforms (VOUT_2 = 20A)
Output Ripple (VOUT_20A)
Output Ripple (VOUT2_20A)
GDH GDL 0V/DIV
GDH GDL 0V/DIV
GDH2 GDL2 0V/DIV
GDH2 GDL2 0V/DIV
VOUT 50mV/DIV
VOUT2 50mV/DIV
us/DIV
us/DIV
us/DIV
Transient Response (VOUT _ 2A ~ 7A)
Transient Response (VOUT2 _ 2A ~ 7A)
OCP Trip (VOUT = 30A)
SS/EN 2V/DIV
VOUT 50mV/DIV
VOUT2 50mV/DIV
GDH GDL 20V/DIV
VOUT 0.5V/DIV
200us/DIV
200us/DIV
400us/DIV
OCP Trip (VOUT2 = 28A)
EFF (%)
Combined Efficiency (2VIN to VOUT & 2.5VOUT)
95
90
SS2/EN2 2V/DIV GDH2 20V/DIV GDL2 0V/DIV
85
80
75
VOUT2 V/DIV
70
400us/DIV
1
5
10
15
20
IOUT(A)
8
SC2443
Pin Descriptions
Pin # 2 3 4 5 6 7 8 9 0 2 3 4 5 6 7 8 9 20 2 22 23 24 Pin Name INCOMP SYNC AGND REF REFIN COMP2 IN2CS2CS2+ SS2/EN2 AVCC BST2 GDH2 GDL2 PGND PVCC GDL GDH BST SS/EN CS+ CSROSC THPAD Pin Function Inverting Input of the Error Amplifier for the Step-down Controller . The Error Amplifier Output for Step-down Controller . Edge-triggered Synchronization Input. When not synchronized, tie this pin to a voltage above .5V or the ground. An external clock (frequency > frequency set with ROSC) at this pin synchronizes the controllers. Analog Signal Ground Buffered Output of the Internal 0.5V Reference. The non-inverting input of the error amplifier for the step-down converter is internally connected to this pin An external Reference voltage is applied to this pin.The non-inverting input of the error amplifier for the step-down converter 2 is internally connected to this pin. The Error Amplifier Output for Step-down Controller 2. Inverting Input of the Error Amplifier for the Step-down Controller 2. Tie to AVCC for two-phase single output applications. The Inverting Input of the Current-sense Amplifier/Comparator for the Controller 2. The Non-inverting Input of the Current-sense Amplifier/Comparator for the Controller 2. An external capacitor tied to this pin sets (i) the soft-start time (ii) output overload latch off time for step-down converter 2. Pulling this pin below 0.7V shuts off the gate drivers for the second controller. Leave open for two-phase single output applications. Power Supply Voltage for the Analog Portion of the Controllers. Bootstrapped Supply for the High-side Gate Drive 2. Gate Drive Output for the High-side N-channel MOSFET of Output 2. Gate Drive Output for the Low-side N-channel MOSFET of Output 2. Ground Supply for All the Gate drivers. Power Supply Voltage for Low-side MOSFET Drivers. Gate Drive Output for the Low-side N-channel MOSFET of Output . Gate Drive Output for the High-side N-channel MOSFET of Output . Bootstrapped Supply for the High-side Gate Drive . An external capacitor tied to this pin sets (i) the soft-start time (ii) output overload latch off time for buck converter . Pulling this pin below 0.7V shuts off the gate drivers for the first controller. The Non-inverting Input of the Current-sense Amplifier/Comparator for the Controller . The Inverting Input of the Current-sense Amplifier/Comparator for the Controller An external resistor connected from this pin to GND sets the oscillator frequency Solder to the Analog ground plane of the PCB. 9
SC2443
Block Diagram
SYNC 3 ROSC 24 COMP1 2 IN11 REF/IN1+ 5 OSCILLATOR CLK2 CLK1 AVCC 12 UVLO 4.3/4.5V BST1 20 GDH1 19 Q
REFERENCE
EA1 + + 0.5V
PWM +
R S
Non-Overlapping Conduction Control
UVLO
PVCC 17 GDL1 18 PGND 16
CS1+ 22 CS123
+ ISEN +ILIM+ +
ILIM-
++
SLOPE COMP
0.75 VREF
Soft-Start And Overload Hiccup Control
OL DSBL
SS1/EN1 21
75mV 110mV COMP2 7 IN28 REFIN/IN2+ 6
OCN
EA2 + + -
AGND 4
0.72 VREFOUT
SC2443 Block Diagram (Channel PWM Control Only)
Figure 1. SC2443 Block Diagram
0
SC2443
Applications Information
Description
The SC2443 is a constant frequency 2-phase current-mode step-down PWM switching controller driving all N-channel MOSFET. The two channels of the controller operate at 80 degrees out-of-phase from each other. Since input currents are interleaved in a two-phase converter, input ripple current is lower and smaller input capacitor can be used for filtering. Also, with lower inductor current and smaller inductor ripple current per phase, overall I2R losses are reduced. The SC2443 operates in synchronous continuousconduction mode. It can be configured either as two independent step-down controllers producing two separate outputs or as a dual-phase single-output controller by tying the IN2- pin to VCC. In single output operation, the channel one error amplifier controls both channels and the channel two error amplifier is disabled. Soft-start and overload hiccup of both channels is synchronized to channel one. The supply voltages for the high-side gate drivers are obtained from two diode-capacitor bootstrap circuits. If the bootstrap capacitor is charged from VCC, the highside gate drive voltage swing will be from approximately 2VCC to the ground. The power dissipated in the highside gate driver is not higher with higher voltage swing because the gate-source voltage of the high-side MOSFET still swing from zero to VCC. The outputs of the low-side gate drivers swing from VCC to ground. The SC2443 has internal ramp-compensation to prevent sub-harmonic oscillation when operating above 50% duty cycle. There is enough ramp internally for a sensed voltage ripple between /4 to /3 of the full-scale sensed voltage limit of 75mV. The maximum sensed voltage limit is unaffected by the compensating ramp.
Current-Sensing
Frequency Setting and Synchronization
The internal oscillator of the SC2443 runs at twice the phase frequency. The free-running frequency of the oscillator can be programmed with an external resistor from the ROSC pin to ground. The step-down controllers are capable of operating up to MHz. It is necessary to consider the operating duty-ratio before deciding the switching frequency. See Applications Information section for more details. When synchronized externally, the applied clock frequency should be twice the desired phase frequency. The synchronizing clock frequency should also be between 2 - 2.6 times the set free-running channel frequency.
There are two ways to sense the inductor current for current-mode control with the SC2443. Since the peak inductor current corresponds to 75mV of sensed voltage (CS+ - CS-), resistor current sensing can be used at the output without resulting in excessive power dissipation. Although accurate and far easier to lay out than high-side resistor sensing, a pair of precision sense resistors adds cost to the converter. With proper RC filter, Inductor DCR sensing can also be used for SC2443 resulting in low cost and without extra power dissipation.
Error Amplifiers
Control Loop
The SC2443 uses peak current-mode control for fast transient response, ease of compensation and current sharing in single output operation. The low-side MOSFET of each channel is turned off at the falling-edge of the phase timing clock. After a brief non-overlapping time interval of 90ns, the high-side MOSFET is turned on. The phase inductor current ramps up. When the sensed inductor current reaches the threshold determined by the error amplifier output and compensation ramp, the high-side MOSFET is turned off. After a non-overlapping conduction time of 90ns, the low-side MOSFET is turned on.
In closed loop operation, the error amplifier output ranges from .V to 3.5V. The upper output operating range of either error amplifier is reserved for positive currentsense voltage (CS+ - CS-) and corresponds to positive (sourcing) output current. If the amplifier swings to its lower operating range, the amplifier will still modulate the high-side gate drive duty-ratio. However the peak currentsense voltage (hence the peak inductor current) will be limited to a negative value. The error amplifier output is about 2.2V when the peak sense-voltage is zero. The built-in offset in the current sense amplifier together with synchronous continuous-conduction mode of operation allows the SC2443 to regulate the output irrespective of the direction of the load current.
SC2443
Applications Information (continued)
The non-inverting input of the first feedback amplifier is tied to the internal 0.5V voltage reference. Both the noninverting and the inverting inputs of the second error amplifier are brought out as device pins so that the output of the second converter can be made to track the output of the first channel. For example in DDR applications, Channel can be used to generate VDDQ (2.5V) from the input (5V or 2V) and channel 2 is used to produce a tracking VTT (.25V) with VDDQ being its input. current reaching its current limit and the instant the converter shuts down. This is due to cycle skipping(a consequence of inductor current sense) reduces the actual operating frequency. The SS/EN pin can also be used as the enable input for that channel. Both the high-side and the low-side MOSFETs will be turned off if the SS/EN pin is pulled below 0.7V.
Operating Frequency (fs)
Current-Limit
The maximum current sense voltage of +75mV is the cycle-by-cycle peak current limit when the load is drawing current from the converter. There is no cycle-bycycle current limiting when the inductor current flows in the negative direction. However once the valley of the current sense voltage exceeds -0mV, the corresponding channel will undergo shutdown and restart (hiccup).
Soft-Start and Overload Protection
The switching frequency in the SC2443 is userprogrammable. The advantages of using constant frequency operation are simple passive component selection and ease of feedback compensation. Before setting the operating frequency, the following trade-offs should be considered. ) Passive component size 2) Circuitry efficiency 3) EMI condition 4) Minimum switch on time and 5) Maximum duty ratio For a given output power, the sizes of the passive components are inversely proportional to the switching frequency, whereas MOSFET and Diodes switching losses are proportional to the operating frequency. Other issues such as heat dissipation, packaging and the cost issues are also to be considered. The frequency bands for signal transmission should be avoided because of EM interference.
The undervoltage lockout circuit discharges the SS/EN capacitors. After VCC rises above 4.5V, the SS/EN capacitors are slowly charged by internal 2mA current source. With internal PNP transistors, the SS/EN voltages clamp the error amplifier outputs. When the error amplifier output rises to 2.2V, the high-side MOSFET starts to switch. As the SS/ EN capacitor continues to be charged, the COMP voltage follows. The converter gradually delivers increasing power to the output. The inductor current follows the COMP voltage envelope until the output goes into regulation. The SS/EN clamp on COMP is then released. After the SS/EN capacitor is charged above 3.2V (high enough for the error amplifier to provide full load current), the overload detection circuit is activated. If the output voltage falls below 70% of its set value or the valley current-sense voltage exceeds -0mV, an overload latch will be set and both the top and the bottom MOSFETs will be turned off. The SS/EN capacitor is slowly discharged with an internal .4mA current sink. The overload latch is reset when the SS/EN capacitor is discharged below 0.5V. The SS/EN capacitor is then recharged with the 2uA current source and the converter undergoes soft-start. If overload persists, the SC2443 will undergo repetitive shutdown and restart. If the output is short-circuited, the inductor current will not increase indefinitely between the time the inductor
Minimum Switch On Time Consideration
In the SC2443 the falling edge of the clock turns on the top MOSFET. The inductor current and the sensed voltage ramp up. After the sensed voltage crosses a threshold determined by the error amplifier output, the top MOSFET is turned off. The propagation delay time from the turnon of the controlling FET to its turn-off is the minimum switch on time. The SC2443 has a minimum on time of about 50ns at room temperature. This is the shortest on interval of the controlling FET. The controller either does not turn on the top MOSFET at all or turns it on for at least 50ns. For a synchronous step-down converter, the operating duty cycle is VO / VIN . So the required on time for the VIN x FS ) . If the frequency is set top MOSFET is VO / ( such that the required pulse width is less than 50ns, then the converter will start skipping cycles. Due to minimum on time limitation, simultaneously operating at
2
SC2443
Applications Information (continued)
very high switching frequency and very short duty cycle is not practical. If the voltage conversion ratio VO / VIN and hence the required duty cycle is higher, the switching frequency can be increased to reduce the sizes of passive components. There will not be enough modulation headroom if the on time is simply made equal to the minimum on time of the SC2443. For ease of control, we recommend the required pulse width to be at least .5 times the minimum on time.
PC Board Layout Issues
Circuit board layout is very important for the proper operation of high frequency switching power converters. A power ground plane is required to reduce ground bounces. The following are suggested for proper layout: Power Stage ) Separate the power ground from the signal ground. In the SC2443, the power ground PGND should be tied to the source terminal of lower MOSFETs. The signal ground AGND should be tied to the negative terminal of the output capacitor. 2) Minimize the size of high pulse current loop. Keep the top MOSFET, bottom MOSFET and the input capacitors within a small area with short and wide traces. In addition to the aluminum energy storage capacitors, add multilayer ceramic (MLC) capacitors from the input to the power ground to improve high frequency bypass. 3) Reduce high frequency voltage ringing. Widen and shorten the drain and source traces of the MOSFET to reduce stray inductances. Add a small RC snubber if necessary to reduce the high frequency ringing at the phase node. Sometimes slowing down the gate drive signal also helps in reducing the high frequency ringing at the phase node.
Setting the Switching Frequency
The switching frequency is set with an external resistor connected from Pin 24 to ground. The set frequency is inversely proportional to the resistor value (Figure 2). Figure 2. Free running frequency vs. ROSC.
800 700 600
fs (kHz)
500 400 300 200 100 0 0 50 100 150 200 250 Rosc (k Ohm)
Setting the Output Voltage
The non-inverting input of the channel-one error amplifier is internally tied the 0.5V voltage reference output (Pin 5). The non-inverting input of the channel-two error amplifier is brought out as a device pin (Pin 6) to which the user can connect Pin 5 or an external voltage reference. A simple voltage divider (Ro at top and Ro2 at bottom) sets the converter output voltage. The voltage feedback gain h=0.5/Vo is related to the divider resistors value as h R o2 = R o1. 1- h
4) Shorten the gate driver path. Integrity of the gate drive (voltage level, leading and falling edges) is important for circuit operation and efficiency. Short and wide gate drive traces reduce trace inductances. Bond wire inductance is about 2~3nH. If the length of the PCB trace from the gate driver to the MOSFET gate is inch, the trace inductance will be about 25nH. If the gate drive current is 2A with 0ns rise and falling times, the voltage drops across the bond wire and the PCB trace will be 0.6V and 5V respectively. This may slow down the switching transient of the MOSFET. These inductances may also ring with the gate capacitance. 5) Put the decoupling capacitor for the gate drive power supplies (BST and PVCC) close to the IC and power ground. Control Section 6) The frequency-setting resistor Rosc should be placed close to Pin 3. Trace length from this resistor to the analog
3
SC2443
Applications Information (continued)
ground should be minimized. 7) Solder the bias decoupling capacitor right across the AVCC and analog ground AGND. 8) Place the inductor DCR sense components away from the power circuit and close to the corresponding CS+ and CS- pins. Use X7R type ceramic capacitor for the DCR sense capacitor because of their temperature stability. 9) Use an isolated local ground plane underneath the controller and tie it to the negative side of output capacitor bank. 0) Comp pin is sensitive to noise. Place compensation network components away from noise signal (i.e. gate driver signals, phase node) and close to corresponding Comp pin .
4
SC2443
Evaluation Application Circuit _ Single Output, Current share configuration
12VIN D1 1N4148
270uF/16V/OSCON
C1
10uF/16V
C2
C3
270uF/16V/OSCON
Q1 R1 C4 CS1- CS1+ R5 124K R7
19
0R 1uF
IPD09N03LA
L1 R2 10K R3 C6 22pF
1.5uH/1.8mR C5 100nF
C7 22nF 0R
23 22 21 20
IPD06N03LA
Q2
Q3
IPD06N03LA
1R C8 2.2nF CS1+ CS1-
R4 N.P.
R6 10R R8 560R
U1
CS1+ BST1 CS1SS1/EN1 ROSC GDH1
24
IN11 IN1COMP1 SYNC AGND REF
SS2/EN2 COMP2 AVCC
GDL1 PVCC PGND 16 15 GDL2 GDH2 BST2 14 13 17
18 12VIN R10 C9 1uF R11 0R 2R2 D2 1N4148 IPD09N03LA C20 1uF R13 C10
10uF/16V
1VOUT/40A
R9 C12 C13 N.P 4 5 6 REFIN
IN2-
47K 3
2
C11
270uF/16V/OSCON
C14
10uF/6.3V
C15
C16
C17
C18
C19
Q4
330pF
SC2443
L2 R12 10K C22
1.5uH/1.8mR C21 100nF R15 1.05K
CS2-
CS2+
R18
0R
C23 100nF
7
R17
10 11 12 8 9
0R
IPD06N03LA
Q5
Q6
IPD06N03LA
1R C24 2.2nF R21 C25 1uF 10R
22pF
R14 N.P.
R16 10R R19 560R 12VIN
IN1R20 1K
5
10uF/6.3V
1500uF/6.3V/FL
1500uF/6.3V/FL
1500uF/6.3V/FL
N.P.
SC2443
Evaluation Board Bill of Materials
Single Output Current Share Configuration Item 2 3 4 5 6 7 8 9 0 2 3 4 5 6 7 8 9 20 2 22 23 24 25 Reference C,C0 C2,C3,C C4,C9,C20,C25 C5,C2,C23 C6,C22 C7 C8,C24 C2 C4,C9 C5,C6,C7 D,D2 L,L2 Q,Q4 Q2,Q3,Q5,Q6 R,R7,R, R7,R8 R2,R2 R3,R3 R5 R6,R6.R2 R8,R9 R9 R0 R5 R20 U Quantity 2 3 4 3 2 2 2 3 2 2 2 4 5 2 2 3 2 Description 6V X5R ceramic capacitor 6V Aluminum solid capacitor _SEPC series 6V X5R ceramic capacitor 6V X7R ceramic capacitor 25V X7R ceramic capacitor 16V X7R ceramic capacitor 25V X7R ceramic capacitor 25V X7R ceramic capacitor 6.3V X7R ceramic capacitor 6.3V Aluminum capacitor _ FL series Small signal diode SMD inductor 30V N Channel MOSFET 30V N Channel MOSFET 5% SMD resistor 5% SMD resistor 5% SMD resistor % SMD resistor % SMD resistor % SMD resistor 5% SMD resistor 5% SMD resistor % SMD resistor % SMD resistor Dual phase Sync. step down controller Package 206 8 X 9mm 0603 0603 0603 0603 0603 0603 206 8 X .5mm SMD 2.5 X 2.5 X 0mm D-pack D-pack 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 MLPQ-24 Part 0uF 270uF uF 00nF 22pF 22nF 2.2nF 330pF 0uF 000uF N448 .5uH/.8mR IPD09N03LA IPD06N03LA 0R 0K R 24K 0R 560R 47K 2R2 .05K K SC2443 Vendor Murata Sanyo Murata Panasonic Panasonic Panasonic Panasonic Panasonic Murata Panasonic Any TRIO Infineon Infineon Any Any Any Any Any Any Any Any Any Any SEMTECH
6
SC2443
12VIN D1 1N4148 R1 0R C4 1uF CS1- CS1+ R6 124K U1
CS1+ BST1 CS1SS1/EN1 ROSC GDH1 24 23 22 21 20 19 22nF
C1
10uF/16V
C2
1500uF/16V/FL
C3
N.P.
Q1
IPD09N03LA
L1 2.2uH/2mR R2 15K Q3 N.P. R3 1R C5 100nF C8
1VOUT/20A
Evaluation Application Circuit_ Dual Independant Outputs
C7 R8 0R
C9 Q2 IPD06N03LA C6 27pF CS1+ C12 CS12.2nF R4 N.P.
10uF/6.3V
C10 R7 0R R9 N.P.
C11
R5 1.05K
IN1-
1N1SYNC IN1COMP1 SYNC AGND REF
SS2/EN2 COMP2 AVCC
R10 1K R12 2R2
1 GDL1 PVCC PGND 17 16 15 GDL2 GDH2 BST2
CS2CS2+
18
2 R11 47K C17 N.P. 4 5 6
IN2-
12VIN C13 1uF D2 1N4148 C14
10uF/16V
3 R25 0R
C15
1500uF/16V/FL
Q4
C16 470pF
SC2443
L2 2.2uH/2mR 14 13 R13 0R C18 1uF R14 20K Q6 N.P. R15 1R C25 2.2nF C19 100nF C21 C20 N.P. R19 0R R16 N.P.
22uF/10V/X7R
2.5VOUT/20A
REFIN
C22 R18 0R
C23
C24
R17 4.12K
R20 100K C26 100nF C27 470pF
7
8
9
10
11
12
C28
N.P.
C29
22nF
R23 10R
Q5 IPD06N03LA 12VIN C30 1uF
R21 N.P.
R22 1K
R24 0R
7
IPD09N03LA
10uF/6.3V
1800uF/6.3V/FL
1800uF/6.3V/FL
22uF/10V/X7R
2200uF/6.3V/FL
2200uF/6.3V/FL
SC2443
Evaluation Board Bill of Materials
Dual Independent Output Configuration Item 2 3 4 5 6 7 8 9 0 2 3 4 5 6 7 8 9 20 2 22 23 24 25 26 27 28 29 Reference C,C4 C2,C5 C4,C3,C8, C30 C5,C9,C26 C6 C7,C29 C8,C C9,C0 C2,C25 C6,C27 C2,C24 C22,C23 D,D2 L,L2 Q,Q4 Q2,Q5 R,R7,R,R3, R8,R9,R24 R25 R2 R3,R5 R5 R6 R0,R22 R R2 R4 R7 R20 R23 U Quantity 2 2 4 3 2 2 2 2 2 2 2 2 2 2 2 8 2 2 Description 6V X5R ceramic capacitor 6V Aluminum capacitor _FL series 6V X5R ceramic capacitor 6V X7R ceramic capacitor 25V X7R ceramic capacitor 16V X7R ceramic capacitor 6.3V X7R ceramic capacitor 6.3V Aluminum capacitor _ FL series 25V X7R ceramic capacitor 25V X7R ceramic capacitor 0V X7R ceramic capacitor 6.3V Aluminum capacitor _ FL series Small signal diode Through hole inductor 30V N Channel MOSFET 30V N Channel MOSFET 5% SMD resistor 5% SMD resistor 5% SMD resistor % SMD resistor % SMD resistor % SMD resistor 5% SMD resistor 5% SMD resistor 5% SMD resistor % SMD resistor 5% SMD resistor 5% SMD resistor Dual phase Sync. step down controller D-pack D-pack 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 0603 MLPQ-24 Package 206 0 X 20mm 0603 0603 0603 0603 206 0 X 6mm 0603 0603 206 0 X 20mm SMD Part 0uF 500uF uF 00nF 27pF 22nF 0uF 800uF 2.2nF 470pF 0uF 2200uF N448 2.2uH/2mR IPD09N03LA IPD06N03LA 0R 5K R .05K 24K K 47K 2R2 20K 4.2K 00K 0R SC2443 Vendor Murata Panasonic Murata Panasonic Panasonic Panasonic Murata Panasonic Panasonic Panasonic Murata Panasonic Any Any Infineon Infineon Any Any Any Any Any Any Any Any Any Any Any Any SEMTECH
8
SC2443
Outline Drawing - MLPQ-24
A D B
DIMENSIONS INCHES MILLIMETERS DIM MIN NOM MAX MIN NOM MAX
A A1 A2 b D D1 E E1 e L N aaa bbb .031 .035 .039 .000 .001 .002 - (.008) .007 .010 .012 .152 .157 .163 .100 .106 .110 .152 .157 .163 .100 .106 .110 .020 BSC .012 .016 .020 24 .004 .004 0.80 0.90 1.00 0.00 0.02 0.05 - (0.20) 0.18 0.25 0.30 3.85 4.00 4.15 2.55 2.70 2.80 3.85 4.00 4.15 2.55 2.70 2.80 0.50 BSC 0.30 0.40 0.50 24 0.10 0.10
PIN 1 INDICATOR (LASER MARK)
E
A2 A aaa C A1 D1 LxN E/2 E1 2 1 N e C SEATING PLANE
bxN bbb CAB
NOTES:
D/2
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.
(c) Semtech, Inc. All Rights Reserved. An ISO-registered company. Semtech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Semtech product. No circuit patent licenses are implied. Semtech reserves the right to change the circuitry and specifications without notice at any time. Trademarks and Copyrights belong to their respective holders. (c) 2007 Semtech Corporation
9
SC2443
Land Pattern - MLPQ-24
K
DIMENSIONS DIM C G H K P X Y Z INCHES (.156) .122 .106 .106 .020 .010 .033 .189 MILLIMETERS (3.95) 3.10 2.70 2.70 0.50 0.25 0.85 4.80
(C)
H
G
Z
X P
NOTES:
1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. 2. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD SHALL BE CONNECTED TO A SYSTEM GROUND PLANE. FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR FUNCTIONAL PERFORMANCE OF THE DEVICE.
Contact Information
Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 9302 Phone: (805) 498-2 Fax: (805) 498-3804
www.semtech.com 20

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